B&B Electronics RS-232 to Ethernet Converter ES1A Especificaciones Pagina 52
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Valorado. / 5. Basado en revisión del cliente
Si3216
52 Rev. 1.0
Not Recommended
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3. Control Registers
Note: Any register not listed here is reserved and must not be written.
Table 34. Direct Register Summary
Register Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Setup
0 SPI Mode Select SPIDC SPIM PNI[1:0] RNI[3:0]
1 PCM Mode Select PNI2 WBE PCME PCMF[1:0] PCMT GCI TRI
2 PCM Transmit Start
Count—Low Byte
TXS[7:0]
3 PCM Transmit Start
Count—High Byte
TXS[9:8]
4 PCM Receive Start
Count—Low Byte
RXS[7:0]
5 PCM Receive Start
Count—High Byte
RXS[9:8]
6 Part Number
Identification
PNI[2:0]
Audio
8 Audio Path Loopback
Control
ALM2 DLM ALM1
9 Audio Gain Control RXHP TXHP TXM RXM ATX[1:0] ARX[1:0]
10 Two-Wire Impedance
Synthesis Control
CLC[1:0] TISE TISS[2:0]
11 Hybrid Control HYBP[2:0] HYBA[2:0]
Powerdown
14 Powerdown Control 1 DCOF PFR BIASOF SLICOF
15 Powerdown Control 2 ADCM ADCON DACM DACON GMM GMON
Interrupts
18 Interrupt Status 1 RGIP RGAP O2IP O2AP O1IP O1AP
19 Interrupt Status 2 Q6AP Q5AP Q4AP Q3AP Q2AP Q1AP LCIP RTIP
20 Interrupt Status 3 INDP
21 Interrupt Enable 1 RGIE RGAE O2IE O2AE O1IE O1AE
22 Interrupt Enable 2 Q6AE Q5AE Q4AE Q3AE Q2AE Q1AE LCIE RTIE
23 Interrupt Enable 3 INDE
Indirect Register Access
28 Indirect Data Access—
Low Byte
IDA[7:0]
29 Indirect Data Access—
High Byte
IDA[15:8]
30 Indirect Address IAA[7:0]
- Features 1
- Applications 1
- Description 1
- Functional Block Diagram 1
- 2 Rev. 1.0 2
- TABLE OF CONTENTS 3
- 1. Electrical Specifications 4
- 8 Rev. 1.0 8
- Rev. 1.0 11 11
- 12 Rev. 1.0 12
- Rev. 1.0 13 13
- 14 Rev. 1.0 14
- Parameter 17
- Symbol Test Condition 17
- Max Unit 17
- Figure 9. SPI Timing Diagram 19
- Si3216(M) 20
- Rev. 1.0 21 21
- Rev. 1.0 23 23
- Component (s) Value Supplier 25
- , 1/10 W, ±5% 25
- 26 Rev. 1.0 26
- 2. Functional Description 27
- 2.1.2. Linefeed Architecture 28
- . The ProSLIC can 28
- Rev. 1.0 29 29
- Parameter Description/ 31
- Resolution Register 31
- Location* 31
- Closure Detection 32
- Switching 33
- 34 Rev. 1.0 34
- Figure 19. V 35
- in the Forward Active State 35
- 2.3. Tone Generation 36
- Tone Generator 1 38
- Tone Generator 2 38
- 2.4. Ringing Generation 39
- 2.4.2. Sinusoidal Ringing 40
- 2.4.3. Trapezoidal Ringing 40
- Location 40
- T=1/freq 41
- Figure 23. Ring Trip Detector 42
- 2.5. Audio Path 43
- 44 Rev. 1.0 44
- Rev. 1.0 45 45
- 2.7. Clock Generation 46
- 2.8. Interrupt Logic 46
- Rev. 1.0 47 47
- 48 Rev. 1.0 48
- 2.10. PCM Interface 49
- 50 Rev. 1.0 50
- Rev. 1.0 51 51
- 3. Control Registers 52
- Rev. 1.0 53 53
- 54 Rev. 1.0 54
- Rev. 1.0 55 55
- CALM1 CALM2 CALDAC CALADC 55
- 56 Rev. 1.0 56
- Rev. 1.0 57 57
- 58 Rev. 1.0 58
- Rev. 1.0 59 59
- 60 Rev. 1.0 60
- Rev. 1.0 61 61
- 62 Rev. 1.0 62
- Rev. 1.0 63 63
- 64 Rev. 1.0 64
- Rev. 1.0 65 65
- 66 Rev. 1.0 66
- Rev. 1.0 67 67
- 68 Rev. 1.0 68
- Rev. 1.0 69 69
- 70 Rev. 1.0 70
- Rev. 1.0 71 71
- 72 Rev. 1.0 72
- Rev. 1.0 73 73
- 74 Rev. 1.0 74
- Rev. 1.0 75 75
- 76 Rev. 1.0 76
- Rev. 1.0 77 77
- 78 Rev. 1.0 78
- Rev. 1.0 79 79
- 80 Rev. 1.0 80
- Rev. 1.0 81 81
- 82 Rev. 1.0 82
- Rev. 1.0 83 83
- 84 Rev. 1.0 84
- Rev. 1.0 85 85
- 86 Rev. 1.0 86
- Rev. 1.0 87 87
- 88 Rev. 1.0 88
- Rev. 1.0 89 89
- 90 Rev. 1.0 90
- Rev. 1.0 91 91
- 92 Rev. 1.0 92
- Rev. 1.0 93 93
- 94 Rev. 1.0 94
- Rev. 1.0 95 95
- 96 Rev. 1.0 96
- Rev. 1.0 97 97
- 98 Rev. 1.0 98
- Rev. 1.0 99 99
- 100 Rev. 1.0 100
- Rev. 1.0 101 101
- 102 Rev. 1.0 102
- Rev. 1.0 103 103
- 4. Indirect Registers 104
- Rev. 1.0 105 105
- 106 Rev. 1.0 106
- Rev. 1.0 107 107
- 108 Rev. 1.0 108
- Rev. 1.0 109 109
- 5. Pin Descriptions: Si3216 110
- Rev. 1.0 111 111
- 112 Rev. 1.0 112
- 6. Pin Descriptions: Si3201 113
- 7. Ordering Guides 114
- Rev. 1.0 115 115
- 116 Rev. 1.0 116
- Rev. 1.0 117 117
- 118 Rev. 1.0 118
- Rev. 1.0 119 119
- DOCUMENT CHANGE LIST 120
- Rev. 1.0 121 121
- CONTACT INFORMATION 122
- Mouser Electronics 123
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