B&B Electronics RS-232 to Ethernet Converter ES1A Especificaciones Pagina 43
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- Tabla de contenidos
- MARCADORES
Valorado. / 5. Basado en revisión del cliente
Si3216
Rev. 1.0 43
Not Recommended
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2.5. Audio Path
Unlike traditional SLICs, the codec function is integrated
into the ProSLIC. The 16-bit codec offers software-
selectable 200 Hz to 3.4 kHz narrowband and 50 Hz to
7 kHz (Si3216 only) wideband audio modes,
programmable gain/attenuation blocks, and several
loop-back modes. The signal path block diagram is
shown in Figure 24.
2.5.1. Transmit Path
In the transmit path, the analog signal fed by the external
ac coupling capacitors is amplified by the analog
transmit amplifier, ATX, prior to the A/D converter. ATX
has the following gain options: mute, –3.5, 0, and
3.5 dB. The main role of ATX is to coarsely adjust the
signal swing to be as close as possible to the full-scale
input of the A/D converter to maximize the signal-to-
noise ratio of the transmit path. After passing through an
anti-aliasing filter, the analog signal is processed by the
A/D converter, producing a 16-bit wide, linear PCM data
stream. The standard requirements for transmit path
attenuation for signal frequencies above the audio band
are implemented as part of the combined decimation
filter characteristic of the A/D converter. An additional
filter, THPF, implements the high-pass attenuation
requirements for signals below 50 Hz. The linear PCM
data stream output from THPF is amplified by the
transmit-path programmable gain amplifier, ADCG,
which can be programmed from –
dB to 6 dB. The final
step in the transmit path signal processing is the user-
selectable A-law or µ-law compression block. In
narrowband mode, µ-law or A-law compression can be
selected to reduce the data stream word width to 8 bits.
Table 30. Associated Registers for Ring Trip Detection
Parameter Register Location
Ring Trip Interrupt Pending RTIP Direct Register 19
Ring Trip Interrupt Enable RTIE Direct Register 22
Ring Trip Detect Debounce Interval RTDI[6:0] Direct Register 70
Ring Trip Threshold RPTP[5:0] Indirect Register 16
Ring Trip Filter Coefficient NRTP[12:0] Indirect Register 23
Ring Trip Detect Status (monitor only) RTP Direct Register 68
Note: The ProSLIC uses registers that are both directly and indirectly mapped. A “direct” register is one that is mapped
directly. An “indirect” register is one that is accessed using the indirect access registers (direct registers 28 through
31).
Table 31. Recommended Ring Trip Values for Ringing
Ringing
Frequency
NRTP RPTP RTDI
Hz decimal hex decimal hex decimal hex
16.667 64 0200 34 mA 3600 15.4 ms 0F
20 100 0320 34 mA 3600 12.3 ms 0B
30 112 0380 34 mA 3600 8.96 ms 09
40 128 0400 34 mA 3600 7.5 ms 07
50 213 06A8 34 mA 3600 5 ms 05
60 256 0800 34 mA 3600 4.8 ms 05
- Features 1
- Applications 1
- Description 1
- Functional Block Diagram 1
- 2 Rev. 1.0 2
- TABLE OF CONTENTS 3
- 1. Electrical Specifications 4
- 8 Rev. 1.0 8
- Rev. 1.0 11 11
- 12 Rev. 1.0 12
- Rev. 1.0 13 13
- 14 Rev. 1.0 14
- Parameter 17
- Symbol Test Condition 17
- Max Unit 17
- Figure 9. SPI Timing Diagram 19
- Si3216(M) 20
- Rev. 1.0 21 21
- Rev. 1.0 23 23
- Component (s) Value Supplier 25
- , 1/10 W, ±5% 25
- 26 Rev. 1.0 26
- 2. Functional Description 27
- 2.1.2. Linefeed Architecture 28
- . The ProSLIC can 28
- Rev. 1.0 29 29
- Parameter Description/ 31
- Resolution Register 31
- Location* 31
- Closure Detection 32
- Switching 33
- 34 Rev. 1.0 34
- Figure 19. V 35
- in the Forward Active State 35
- 2.3. Tone Generation 36
- Tone Generator 1 38
- Tone Generator 2 38
- 2.4. Ringing Generation 39
- 2.4.2. Sinusoidal Ringing 40
- 2.4.3. Trapezoidal Ringing 40
- Location 40
- T=1/freq 41
- Figure 23. Ring Trip Detector 42
- 2.5. Audio Path 43
- 44 Rev. 1.0 44
- Rev. 1.0 45 45
- 2.7. Clock Generation 46
- 2.8. Interrupt Logic 46
- Rev. 1.0 47 47
- 48 Rev. 1.0 48
- 2.10. PCM Interface 49
- 50 Rev. 1.0 50
- Rev. 1.0 51 51
- 3. Control Registers 52
- Rev. 1.0 53 53
- 54 Rev. 1.0 54
- Rev. 1.0 55 55
- CALM1 CALM2 CALDAC CALADC 55
- 56 Rev. 1.0 56
- Rev. 1.0 57 57
- 58 Rev. 1.0 58
- Rev. 1.0 59 59
- 60 Rev. 1.0 60
- Rev. 1.0 61 61
- 62 Rev. 1.0 62
- Rev. 1.0 63 63
- 64 Rev. 1.0 64
- Rev. 1.0 65 65
- 66 Rev. 1.0 66
- Rev. 1.0 67 67
- 68 Rev. 1.0 68
- Rev. 1.0 69 69
- 70 Rev. 1.0 70
- Rev. 1.0 71 71
- 72 Rev. 1.0 72
- Rev. 1.0 73 73
- 74 Rev. 1.0 74
- Rev. 1.0 75 75
- 76 Rev. 1.0 76
- Rev. 1.0 77 77
- 78 Rev. 1.0 78
- Rev. 1.0 79 79
- 80 Rev. 1.0 80
- Rev. 1.0 81 81
- 82 Rev. 1.0 82
- Rev. 1.0 83 83
- 84 Rev. 1.0 84
- Rev. 1.0 85 85
- 86 Rev. 1.0 86
- Rev. 1.0 87 87
- 88 Rev. 1.0 88
- Rev. 1.0 89 89
- 90 Rev. 1.0 90
- Rev. 1.0 91 91
- 92 Rev. 1.0 92
- Rev. 1.0 93 93
- 94 Rev. 1.0 94
- Rev. 1.0 95 95
- 96 Rev. 1.0 96
- Rev. 1.0 97 97
- 98 Rev. 1.0 98
- Rev. 1.0 99 99
- 100 Rev. 1.0 100
- Rev. 1.0 101 101
- 102 Rev. 1.0 102
- Rev. 1.0 103 103
- 4. Indirect Registers 104
- Rev. 1.0 105 105
- 106 Rev. 1.0 106
- Rev. 1.0 107 107
- 108 Rev. 1.0 108
- Rev. 1.0 109 109
- 5. Pin Descriptions: Si3216 110
- Rev. 1.0 111 111
- 112 Rev. 1.0 112
- 6. Pin Descriptions: Si3201 113
- 7. Ordering Guides 114
- Rev. 1.0 115 115
- 116 Rev. 1.0 116
- Rev. 1.0 117 117
- 118 Rev. 1.0 118
- Rev. 1.0 119 119
- DOCUMENT CHANGE LIST 120
- Rev. 1.0 121 121
- CONTACT INFORMATION 122
- Mouser Electronics 123
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