B&B Electronics PC Watchdog Timer Card ATXWDT Especificaciones Pagina 29

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Intel
®
SRMK2 Internet Server Technical Product Specification 29
3.4.2 ServerWorks OSB4 South Bridge Chip
The OSB4 South Bridge chip is a multifunctional PCI device implementing the PCI-to-ISA bridge,
PCI IDE functionality, USB host/hub functionality, and enhanced power management. The OSB4
South Bridge features:
Multifunctional PCI-to-ISA Address / Data bridge
PCI Slave
PCI Arbiter
PCI Master
Full ISA bus support
ISA Arbiter
One 8253 Counter/Timer
Client Management
Temperature Sensing Inputs
Two I2C Bit Bang Interfaces for (GPOC)
Four general purpose I/O (GPMs)
Support for the PCI bus at 33 MHz
Support for PCI Rev 2.1 Specification
Integrated dual-channel enhanced IDE interface
Support for up to four IDE devices
PIO Mode 4 transfers at up to 16 MB/sec
Support for Ultra DMA/33 synchronous DMA mode transfers at up to 33 MB/sec
Bus master mode with an 8 x 32-bit buffer for bus master PCI IDE burst transfers
Enhanced DMA controller
Two 8237-based DMA controllers
Support for PCI DMA with three PC/PCI channels and distributed DMA protocols
Fast type-F DMA for reduced PCI bus usage
Interrupt controller based on 82C59
Support for 15 interrupts
Programmable for edge/level sensitivity
Power management logic
Sleep/resume logic
Support for Wake on Ring and Wake on LAN
technology
Support for APM and ACPI Revision 1.0
Internal APIC Controller
USB Interface
SMB bus interface
Glueless Serial interface with CNB30LE North Bridge chip
Black Box Security Functions
2X Passwords
CMOS Protection
Super I/O Security
Real-Time Clock
256-byte battery-backed CMOS SRAM
Date alarm
16-bit counters/timers based on 82C54
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