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SRMK2 Internet Server Technical Product Specification 108
Figure 23: ReadSEL Example
Reboot -The BIOS console will reboot the system. During reboot, the BIOS will examine
BIOSControl to determine if any special action is required such as powering off the
system or booting the service partition.
CMOS/NVRAM commands
GetBootCount
The number of times the OS has tried to boot
GetLastState
This represents the last known state of the system. Possible values are:
0 Unknown (default)
1 POST Machine is in POST
2 Emergency Mode BIOS emergency mode (console redirection)
3 OS Booting Bootstrap about to be loaded
4 OS Initializing OS booted and started running
5 OS Running OS fully up
6 OS Going Down OS starting graceful shut down
7 OS Down OS mostly shutdown (All but essential processes and services)
GetLastSensor
This code represents the last known state of the sensors as monitored by either OS
instrumentation software and/or the BIOS. Possible values are:
0 Unknown (default)
1 Normal
08 10 99 02 27 07 41 30 00 02 00 00 00 00 00 00
08 10 99 02 26 05 34 11 00 02 00 00 00 00 00 00
>ReadSEL 0 1
- SRMK2 Internet Server 1
- Revision History 2
- !! NOTE 3
- CAUTION 3
- WARNING 3
- Contents 5
- Conventions and Terminology 10
- 1 Introduction 11
- 2 Chassis Description 13
- 2.1.3 Front View of Chassis 14
- 2.1.4 Rear View of Chassis 15
- 2.2.1 AC Power Supply 15
- 2.2.1.3 AC Power Line 16
- Wire lengths should vary to 18
- 2.2.2 DC Power Supply 19
- 2.2.3 BTU information 19
- 2.2.4 System Cooling 20
- Cable Purpose 21
- Description 21
- Figure 9: Internal cables 22
- 2.3 System Configuration 23
- 3.1 Overview 24
- 3.2 Serverboard Layout 25
- !! NOTE 27
- 3.4 Chipset 28
- 3.5 Memory 30
- 3.6 SCSI Host bus Interface 31
- 3.7 IDE Interface 31
- 3.8 USB 31
- 3.9 I/O Controller 32
- 3.12 Hardware Monitor 34
- 3.14 Speaker 35
- 3.15 Fan Support 36
- 3.16 Baseboard Programming 36
- 3.16.3 SMI and NMI Routing 37
- 3.17.2 Midboard Connectors 41
- Pin Signal Name 42
- 3.20 DC Voltage Regulation 53
- 4 PCI Riser Board 54
- PIRQA INTA 55
- PIRQB INTB 55
- PIRQC INTC 55
- PIRQD INTD 55
- Figure 20: PCI riser board 56
- 5 Front Panel Board 57
- LED Description 58
- 6 SCSI Backplane 59
- 7 BIOS Description 61
- 7.2.1 Configuration Utility 62
- 7.3 System BIOS 63
- 7.3.1.7 Boot Splash Screen 67
- 7.3.2 Performance Features 67
- Name Description Default 67
- 7.3.2.2 Cache State on Boot 68
- 7.3.3 Reliability Features 69
- 7.3.3.4 ECC and SMI Support 70
- 7.3.4 System Services 71
- 7.3.4.1 New Cache Services 72
- 7.3.4.2 Get Version Info 73
- Returns Description 73
- 7.3.4.3 Processor Info 74
- 7.3.5 Boot Options 74
- 7.3.5.1 Quiet Boot 74
- 7.3.5.2 PXE Boot 74
- 7.3.6 OEM Customization 75
- offset 21h is 75
- Bit Definition 78
- 7.3.7 SMBIOS Support 78
- 7.3.8 Soft Power Switch 79
- 7.3.10 ACPI Support 80
- 7.4.1 LAN Alerts 81
- 7.4.2 WatchDog Timer (WDT) 81
- 7.4.3 Paging Support 82
- 9.1 Error Sources and Types 84
- 9.2 Error Handlers 84
- 9.3 ISA Bus Error 85
- 9.3.2 Processor Bus Error 86
- 9.3.3 Memory Bus Error 87
- 9.3.4 System Limit Error 87
- 9.3.5 Processor Failure 87
- Error Message Description 88
- 10 BIOS Setup Program 90
- 10.2 Main Menu 91
- 10.1 Maintenance Menu 91
- 10.3 Advanced Menu 92
- 10.4 Security Menu 93
- 10.5 Boot Menu 93
- 10.6 System Management Menu 94
- 10.7 Exit Menu 96
- 11 Certification 97
- 11.3.1 Japan 98
- 11.3.2 Canada 98
- 11.3.4 Taiwan (BSMI) 99
- 11.4.1 Japan 99
- 11.4.2 Canada 99
- 11.5.1 SRMK2D 100
- 11.5.2 Taiwan (BSMI) 100
- Declarations 101
- 11.7 Environmental Limits 101
- 12.1 Reliability 102
- 12.2 Serviceability 102
- 13 Compatibility Testing 103
- 14.1 Online Support 104
- 14.2 Specifications 104
- Appendix A 107
- CMOS/NVRAM commands 108
- >PutPagerNum 918005991234 111
- Password commands 112
- Help command 112
- Security 113
- Figure 28: Password prompt 114
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