B&B Electronics PC Watchdog Timer Card ATXWDT Manual de usuario descargar pdf (Pagina 42)

BIOS SETUP

38 MB800 User’s Manual

Advanced Chipset Features

This Setup menu controls the configuration of the chipset.

Advanced Chipset Features

DRAM Timing Selectable By SPD ITEM HELP

CAS Latency Time 2.5 Menu Level

Active to Precharge Delay 7

DRAM RAS# to CAS# Delay 3

DRAM RAS# Precharge 3

Turbo Mode Disabled

Memory Frequency For Auto

System BIOS Cacheable Enabled

Video BIOS Cacheable Enabled

Delayed Transaction Enabled

Delay Prior to Thermal 16 Min

AGP Aperture Size (MB) 64

ICH4 LAN Enabled

** On-Chip VGA Setting **

On-Chip VGA Enabled

On-Chip Frame Buffer Size 8MB

Boot Display Auto

DRAM Timing Selectable

This option refers to the method by which the DRAM timing is selected.

The default is By SPD.

CAS Latency Time

You can select CAS latency time in HCLKs of 2/2 or 3/3. The system

board designer should set the values in this field, depending on the

DRAM installed. Do not change the values in this field unless you change

specifications of the installed DRAM or the installed CPU. The choices

are 2 and 3.

Active to Precharge Delay

The default setting for the Active to Precharge Delay is 6.

DRAM RAS# to CAS# Delay

This option allows you to insert a delay between the RAS (Row Address

Strobe) and CAS (Column Address Strobe) signals. This delay occurs

when the SDRAM is written to, read from or refreshed. Reducing the

delay improves the performance of the SDRAM.

DRAM RAS# Precharge

This option sets the number of cycles required for the RAS to accumulate

its charge before the SDRAM refreshes. The default setting for the Active

to Precharge Delay is 3.

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B&B Electronics PC Watchdog Timer Card ATXWDT Manual de usuario Pagina 42